Fixes readability of error messages, based on comment in CL:

   https://codereview.chromium.org/1652173002

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1654803003 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1652173002 .

This CL implements two little pieces of the lowering that are needed
for --filetype=obj support in arm. With this change, spec2k builds and
verifies with --filetype=obj

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1651603003 .

This is the same as the fix that https://codereview.chromium.org/1531623007 (b19d39cc) made to the same file.

Otherwise the broken x86-32 implementation of getGprForType() gives an assertion failure.

BUG= none
R=eholk@chromium.org

Review URL: https://codereview.chromium.org/1643383002 .

Fixes issues raised after committing the following CLs:

    https://codereview.chromium.org/1649053002
    https://codereview.chromium.org/1647113003

Also generates a trap instruction if hybrid assembly is turned off, and
the skip implementation command line flag is turned on.

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1654483002 .

Note: Once this CL has landed, Subzero's "make -f Makeefile.standalone
check-spec" works in the integrated assembler without using hybrid
assembly.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1649053002 .

Also fixes the non-hybrid ARM assembler to display the instruction it
can't translate, making it easier to see what can't be handled. This
change was added to see what still isn't being translated in spec2k
performance tests.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1647113003 .

Implements moves between double and i64. It also completes the
implementation of the IR "move" instruction, except for vectors.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=eholk@chromium.org, jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1642253002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1642303002 .

The problem is that if you too aggressively -reg-use or -reg-exclude, you can get failures because of inherently high register pressure, and there are also contributions from the "specialty" register classes.

For example, when you combine load optimization, address mode inference, local register availability optimization, and the div instruction, you can end up needing 5 simultaneously live infinite-weight registers.

The fix/enhancement here is to keep track of the "reserve" set of registers for each register class, and allow the register allocator to draw from that as a last resort.  This behavior is guarded by the -reg-reserve flag.

This CL also includes two improvements in lowering sequences to reduce register pressure.

BUG= none
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1641653004 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1646033002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1640933002 .

See CL https://codereview.chromium.org/1645683003

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1641753003 .

Adds vmovrs that implements moving from an integer (GP) register and a
float (S) register to the integrated ARM assembler.

The test also shows that moving from a float (S) register to an
integer (GP) register also works.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=eholk@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1647683002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1639403004 .

R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1639063002 .

Adds generating binary versions of vmov for moves between floating
point registers, in the integrated ARM assembler.

Also adds simple lit test. Also simplifies the lit test for push/pop
(which had to be changed anyway since it included vmov instructions as
well).

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=eholk@chromium.org, jpp@chromium.org

Review URL: https://codereview.chromium.org/1645683003 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org, kschimpf@google.com

Review URL: https://codereview.chromium.org/1637173002 .

This CL also changes UnimplementedLoweringError to display the name of
the unimplemented instruction.

Improve test coverage for ARM32 vector load instructions.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org, kschimpf@google.com

Review URL: https://codereview.chromium.org/1639923002 .

These were all pointed out by the llvm test suite, the gcc torture
tests, and the scons tests.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4077
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1631383002 .

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1574883002 .

Patch from Reed Kotler <rkotlerimgtec@gmail.com>.

Fixes case where IceTargetLowring.cpp and IceInstARM32.cpp generate
implementations for emitIAS().

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1638123002 .

Adds the scalar floating point versions of instruction VMLA to the
integrated ARM assembler.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1634913005 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4077
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1616103002 .

Adds the vmovs/vmovd instructions to the integerated ARM assembler.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1624383004 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1635713002 .

Cleans up the integrated ARM assembler, and its handling of register
memory addresses that can be modified by an immediate value. Handles
each possible encoding of such memory addresses.

Also adds assertions to check that the immediate value has the proper
range for the immediate value, based on the corresponding encoding.

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1630863002 .

Moves "EnsureCapacity Buffer" declarations inside emitInst(), so that
all callers need not add the declaration before calling emitInst().

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1636513002 .

Note: Only adds the APSR_nzcv register form of the instruction.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1636473002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4076
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1615613002 .

Also adds VMOVSR instruction to the integrated ARM assembler.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1596613002 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1623433004 .

The main feature here is that when listing a register via the -reg-use or -reg-exclude option, we can limit the effect to a single register class, instead of applying it across all register classes.  Example:

  pnacl-sz -reg-use i32:eax,i32:ecx,i32:edx -reg-exclude f32:xmm0

Note that without the register class prefix, behavior is the same as before, specifically that the restriction applies to all register classes.

This requires a few high-level changes:

1. We need a mechanism to name *all* register classes, not just the standard ones that map to IceType values.

2. While we're at it, give standard types a more usable name, e.g. "v4i32" instead of "<4 x i32>".

3. Since we've commandeered ":" as the class/register token separator, we change ARM i64 register pair names from e.g. "r0:r1" to "r0r1".

The motivation is that for register allocator torture testing, we'd like to drastically restrict the registers available to e.g. the extensively-used i32 register class, while not overly restricting the seldom-used i32to8 register class (which reflects the set of i32 registers that may trivially truncate to i8).

BUG= none
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/1614273002 .

A previous patch fixed vldrd/vstrd by dividing the immediate offset of
the instruction by 4 before encoding. This does the same for
vldrs/vstrs. It fixes the remaining problems with compiling spec2k
using -filetype=iasm.

It also fixes a minor bug in the divsion by 4, in the case that the
immediate value is negative.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/1617993005 .

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1611293003 .

Fixes the ARM integrated assembler by dividing the immediate offset
of the instruction by 4 before encoding.

BUG= https://bugs.chromium.org/p/nativeclient/issues/detail?id=4334
R=jpp@chromium.org, stichnot@chromium.org

Review URL: https://codereview.chromium.org/1619703008 .

Refactors the Address Mode optimization interface.

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1605103002 .

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1616673004 .

i.e.make -f Makefile.standalone check-lit CHECK_LIT_TESTS=tests_lit/llvm2ice_tests/arith.lll

The default will be for the directory to be in subzero but
it's also possible to create an absolute pathname.

Extended this to work with cross tests.

Added some primitive help for the makefile.

make -f Makefile.standalone help
make -f Makefile.standalone help-check-lit
make -f makefile.standalone help-check-xtest

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1582243005 .

Patch from Reed Kotler <rkotlerimgtec@gmail.com>.

BUG=
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/1571883002 .

Patch from Reed Kotler <rkotlerimgtec@gmail.com>.