Increases number of spec2k tests that run successfully with ASan from 2 to 6.

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/2128383002 .

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2123723002 .

Patch from Mohit Bhakkad <mohit.bhakkad@imgtec.com>.

This patch extends InstMIPS32Mov instruction to support different datatypes, and emit proper low level instruction depending on operands properties and data types.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2122043002 .

Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/2128643002 .

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/2115693002 .

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=kschimpf@google.com, stichnot@chromium.org

Review URL: https://codereview.chromium.org/2108083002 .

We should take care of alignment while discarding GPR registers, I have written larger explanation in a comment.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2101093003 .

Patch from Mohit Bhakkad <mohit.bhakkad@imgtec.com>.

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2101173002 .

Specifically, this is the ability to link variable B to variable A, such that if neither A nor B get a register assignment, they share a stack slot.

This CL just refactors and keeps basically the same functionality, in preparation for new work on variable splitting.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2107073002 .

Split Nodes whenever an early jump is possible by short circuiting boolean
operations. Nodes are split after conservatively checking for side effects,
which include definition of multi block variables, function calls and
instructions involving memory.

BUG=None
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2069923004 .

BUG= none
R=jpp@chromium.org, manasijm@google.com

Review URL: https://codereview.chromium.org/2103613002 .

Reduces register pressure and the number of push/pops slightly.

BUG=none
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2100333002 .

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/2095763002 .

  Index=Var Or Const to Index=Var + Const
  when Var = Var' << N and log2(Const) <= N
  or when Var = (2^M) * (2^N) and log2(Const) <= (M+N)
BUG=none
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2085383002 .

When we skip translating an item due to the -translate-only option, we still need to add a dummy item to the work queue with the proper sequence number, otherwise the emitter thread waits endlessly for the next sequence number and never emits the rest of the items.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2099293002 .

When running with -asm-verbose, assembler directives like the following are generated:

  lv$__123 = 16

These symbols show up in "nm" output of the .o file, and cause inconsistencies in symbol numbering between filetype=asm and filetype=obj, when doing szbuild.py bisection debugging.

The fix is to prepend ".L" to the symbol name, so that the assembler treats it as local.  E.g.:

  .L$lv$__123 = 16

BUG= none
R=eholk@chromium.org

Review URL: https://codereview.chromium.org/2095633002 .

Commit 2e4b960b (https://codereview.chromium.org/2084793002), which made address mode inference more aggressive, exposed a long-standing bug in memory sandboxing, which now manifests in 164.gzip.

The problem is in sandboxed code like this:

  movl %eax, %eax
  movb 64(%rsp,%rax), %cl

If %eax starts out -1, the mov address is something close to %rsp+4GB, instead of %rsp+63.

To fix this, we need to use an lea instruction in more cases - specifically when the sandboxed address has an index register and the non-symbolic portion of the offset is nonzero.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2097193003 .

BUG=none
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2096563004 .

Patch from Sagar Thakur <sagar.thakur@imgtec.com>.

FP register table did not contain correct register information.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2089043003 .

Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.

When building pnacl with --host-flavor=debug, tools at

../../out/llvm_x86_64_linux_work/Release+Asserts/bin

are not available, so we need a fix to enable source code formatting
with tools from

../../out/llvm_x86_64_linux_debug_work/Debug+Asserts/bin

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2081223003 .

Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.

UnimplementedError is removed from three functions because it causes
crashes in almost every test from tests_lit/llvm2ice_tests.

emitVariable appears as correct, UnimplementedError may be there by mistake.

lowerConstants is unimplemented, but its obvious without UnimeplementedError.

lowerJumpTables is unimplemented, but its obvious without UnimeplementedError.

We comment these three anyway while changing and testing, so removing them will
not affect final results anyway.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2086423002 .

Patch from Srdjan Obucina <Srdjan.Obucina@imgtec.com>.

This patch repeats the same changes for MIPS32, which are done in https://codereview.chromium.org/2080633004 for ARM and X86 archs.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2086273002 .

Patch from Mohit Bhakkad <mohit.bhakkad@imgtec.com>.

Lower call instructions for MIPS32.

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2063653003 .

Patch from Mohit Bhakkad <mohit.bhakkad@imgtec.com>.

  Index is Index=Var+Const ==>
    set Index=Var, Offset+=(Const<<Shift)
  Index is Index=Const+Var ==>
    set Index=Var, Offset+=(Const<<Shift)
  Index is Index=Var-Const ==>
    set Index=Var, Offset-=(Const<<Shift)
BUG=none
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2084793002 .

BUG=chromium:https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=kschimpf@google.com, stichnot@chromium.org

Review URL: https://codereview.chromium.org/2086593002 .

A portion of the translation workflow goes like this:

  dump #1
  renumber instructions
  liveness + live range construction
  validateLiveness (exit on failure)
  dump #2

If there are liveness validation errors, instruction numbers are reported with respect to the new instruction numbers, yet the most recent dump output is with respect to the old instruction numbers.  Confusion ensues.

To fix this, we just do dump #2 before validateLiveness.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2080633004 .

The code that calculates maximum out-arg stack space was neglecting the fact that on x86-64, the first N scalar floating-point arguments are passed through xmm registers, not the stack.  As a result, stack frames were sometimes larger than necessary.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2076663006 .

Normally, if a call argument is a rematerializable Variable, it is rematerialized into a GPR (via the "lea" instruction) and then written into the appropriate arg space.

This is appropriate for arguments passed on the stack, but for register arguments, it forces an unnecessary copy through another register.

This CL allows that intermediate register copy to be removed.

The resulting code looks cleaner, but it is unlikely to have much effect on performance - there really aren't register pressure issues because lots of scratch registers are available right before the call (which kills all scratch registers).

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2080443002 .

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=kschimpf@google.com, stichnot@chromium.org

Review URL: https://codereview.chromium.org/2079723002 .

BUG=none
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2067183002 .

Patch from Sagar Thakur <sagar.thakur@imgtec.com>.

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/2067403002 .

The x86 lowering of bitcast between integers and floats forced the transfer through a stack slot (the original implementer *cough* *cough* wasn't aware of the movd instruction).  This requires excess instructions, but also a store to memory followed immediately by a load from that location is very slow.

This fixes the problem by using the movd instruction instead.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2077503002 .

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/2068593003 .

The Om1 recipe also includes register allocation (minimal mode).

BUG= none
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/2069953004 .

Originally, a call instruction was lowered like this:

  // %result = call @foo(...)
  %t1:eax = call foo
  %result = %t1:eax

Because t1 is pre-colored, it is not available as a substitution if the following instruction uses %result as a source operand.

To improve this, we copy it through an intermediate temporary:

  // %result = call @foo(...)
  %t1:eax = call foo
  %t2 = %t1:eax
  %result = %t2

BUG= none
R=eholk@chromium.org

Review URL: https://codereview.chromium.org/2064073005 .

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2064613006 .

The original code legalized *all* i64 constants into a register move, creating unnecessary instructions and slightly higher register pressure in most cases.

Generally, immediates can be used in 64-bit instructions as long as the immediate can be represented as a sign-extended 32-bit value.

BUG= none
R=jpp@chromium.org

Review URL: https://codereview.chromium.org/2063053002 .

BUG=https://bugs.chromium.org/p/nativeclient/issues/detail?id=4374
R=kschimpf@google.com

Review URL: https://codereview.chromium.org/2054943002 .

R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2060203002 .

Patch from Mohit Bhakkad <mohit.bhakkad@imgtec.com>.

BUG=none
R=stichnot@chromium.org

Review URL: https://codereview.chromium.org/2051713002 .

Patch from Sagar Thakur <sagar.thakur@imgtec.com>.